1. Field of the Invention
The present invention relates to an orthogonal transform method for use in providing compressed information, and an art related thereto.
2. Description of the Related Art
In JPEG (Joint Photographic Coding Experts Group) that is a standard method for compressing a static picture, and MPEG (Moving Picture Coding Experts Group) that is a standard method for compressing a moving picture, compressed information is provided using an intra-screen (spatial) correlation.
An image signal is orthogonally transformed in a manner called discrete cosine transform (DCT), thereby providing orthogonal transform coefficients. At this time, a large value is concentrated on low-frequency components in the image signal. In view of such a characteristic, the orthogonal transform coefficients are quantized, thereby providing orthogonal transform coefficient data. Such quantization removes high-frequency components from the image signal. The orthogonal transform coefficient data are subjected to entropy encoding, thereby providing the compressed information.
A matrix operation is required to practice the DCT during encoding and IDCT (inverse discrete cosine transform) during decoding. The matrix operation involves a great amount of arithmetic operation.
Accordingly, the DCT and IDCT are often carried out using dedicated hardware.
In JPEG and MPEG, eight-by-eight DCT is practiced as an orthogonal transformation. However, when the orthogonal transformation is performed for each block, then a block boundary correlation is lost. As a result, a block distortion occurs.
In order to handle such an inconvenience, the orthogonal transformation may be practiced for each of smaller-sized blocks in order to reduce the block distortion. Accordingly, a next-generation coding system would possibly incorporate a four-by-four transformation as the orthogonal transformation.
In order to provide orthogonal transform-dedicated hardware adapted for use in both of the MPEG and the next generation coding system, the orthogonal transform-dedicated hardware must be constructed to provide both eight-by-eight, and four-by-four orthogonal transformations. Similarly to the orthogonal transformation as just described, inverse orthogonal transform-dedicated hardware must be designed for both eight-by-eight and four-by-four inverse orthogonal transformations.
In the orthogonal transformation, the prior art employs two different types of circuits, i.e., eight-by-eight and four-by-four orthogonal transform circuits. Similarly to the orthogonal transformation, in the inverse orthogonal transformation, the prior art uses two different types of circuits, i.e., eight-by-eight and four-by-four inverse orthogonal transform circuits. Such a prior art system brings about a problem of the resulting large-scaled hardware.
The published Japanese Patent Application Examined No. 7-83478 discloses DCT and IDCT apparatuses designed to inhibit an increase in hardware size thereof. These apparatuses are now described with reference to the drawings.
FIG. 23 is a block diagram, illustrating a prior art DCT apparatus.
FIG. 24 is a block diagram, illustrating a prior art IDCT apparatus.
As illustrated in FIG. 23, in encoding, a mirror image-generating circuit 900 produces a mirror image in response to a four-by-four image signal, thereby transforming the four-by-four image signal into an eight-by-eight image signal.
A DCT circuit 901 orthogonally transforms the eight-by-eight image signal from the mirror image-generating circuit 900, thereby providing orthogonal transform coefficients. A pixel-skipping circuit 902 thins out the orthogonal transform coefficients, thereby providing four-by-four orthogonal transform coefficients.
As illustrated in FIG. 24, in decoding, an interpolation circuit 903 supplements orthogonal transform coefficients, thereby transforming the supplemented orthogonal transform coefficients into eight-by-eight orthogonal transform coefficients. The eight-by-eight orthogonal transform coefficients are sent to an IDCT circuit 904.
The IDCT circuit 904 inversely orthogonally transforms the eight-by-eight transform coefficients from the interpolation circuit 903, thereby providing inversely orthogonally transformed data. A mirror image-eliminating circuit 905 eliminates mirror image data from the inversely orthogonally transformed data, thereby providing four-by-four image signals.
This system is characterized in that only the mirror image-generating circuit 900 and the interpolation circuit 902 are added to hardware, thereby inhibiting an increase in hardware size of the DCT apparatus. Similarly, the above system inhibits an increase in hardware size of the IDCT apparatus.
However, a drawback to the above is that the prior art DCT apparatus is constructed to practice four-by-four orthogonal transformation only for each of four pixels-by-four lines-formed blocks.
As a result, the orthogonal transformation-dedicated hardware is activated an increased number of times of activation to practice the four-by-four orthogonal transformation, when compared with the way in which the orthogonal transformation-dedicated hardware is activated to perform the eight-by-eight orthogonal transformation. This causes increased latency when the orthogonal transformation-dedicated hardware is activated.
The term “latency” as mentioned above broadly refers to a time between the moment when the DCT apparatus receives data completely to execute processing and the moment when the DCT apparatus starts to output the processed results.
More specifically, the prior art DCT apparatus is activated once when performing the eight-by-eight orthogonal transformation on an eight pixels-by-eight lines-formed block, but the prior art DCT apparatus is activated four times when practicing the four-by-four orthogonal transformation on the four pixels-by-four lines-formed four blocks.
This means that, assuming that the DCT executes the orthogonal transformation on the same quantity of data, the DCT apparatus is activated to perform the four-by-four orthogonal transformation at latency four times as great as that involved when the DCT apparatus is activated to practice the eight-by-eight orthogonal transformation. Similarly, the prior art IDCT apparatus is activated to perform the four-by-four inverse orthogonal transformation at latency four times as great as that involved when the IDCT apparatus is activated to practice the eight-by-eight inverse orthogonal transformation.
Such increased latency at the activation of the DCT and IDCT apparatuses objectionably reduces processing speeds.